In recent years, the integration of semiconductor integrated circuits has made significant advances due to the miniaturization of constituent MIS transistors. However, since leakage current increases when an MIS transistor, etc., is miniaturized, power consumption also increases. In particular, in DRAMs, SRAMs, etc., that use MIS transistors in their memory cells, an increase of power consumption poses a serious problem.
For this reason, in recent years, non-volatile memories, which retain information even when power is removed, attracted considerable attention. Because of the above-described property, a non-volatile memory does not require any operation to restore the condition that it was in at the time that the power supply was turned off, thereby reducing power consumption. Using this non-volatile memory, an MFMIS (metal-ferroelectric-metal-insulator-semiconductor), which integrates a storage unit that has a non-volatile memory storage function and a transistor that controls data writing, reading, etc., has been proposed. An MFMIS has a floating-gate type of transistor structure, wherein a ferroelectric film serving as a capacity insulating film is disposed between the floating gate of the transistor and a control electrode (upper electrode). The MFMIS utilizes the fact that the threshold of the transistor changes according to the spontaneous polarization that is generated in the ferroelectric film to read data in the film. Since a memory using MFMIS consists of a single transistor, it is attracting attention as the ultimate memory.
Examples of semiconductor devices using such MFMIS include those disclosed in Japanese Unexamined Patent Publication No. 2000-77986 (U.S. Pat. No. 6,314,016). In the semiconductor device disclosed in the publication, a ferroelectric storage unit is connected to the output end of a gate unit that consists of a sequential circuit, such as a latch circuit. This ferroelectric storage unit is designed to maintain the signal that appears at the output end in the form of a corresponding polarized state. With this configuration, even when the power is removed, data is retained by the ferroelectric storage unit.
However, in the MFMIS structure, the application of a voltage to the MFMIS control electrode is required not only for writing data but also for reading it. Accordingly, the properties of the ferroelectric film deteriorate due to the increased number of voltage applications required to read data.
The present invention aims to solve the above-mentioned problem and provide a non-volatile latch circuit that reduces the number of times that voltage is applied to the ferroelectric film for writing and reading data thus preventing deterioration of the ferroelectric properties, and a method for driving the same.